D. Agiakatsikas, G. Papadimitriou, V. Karakostas, D. Gizopoulos, M. Psarakis, C. Belanger-Champagne, and E. Blackmore, “Impact of Voltage Scaling on Soft Errors Susceptibility of Multicore Server CPUs”, IEEE/ACM International Symposium on Microarchitecture (MICRO 2023), Toronto, Canada, October 2023.
Y. Sazeides, A. Gerber, R. Gabor, A. Bramnik, G. Papadimitriou, D. Gizopoulos, C. Nicopoulos, G. Dimitrakopoulos, and K. Patsidis, “IDLD: Instantaneous Detection of Leakage and Duplication of Identifiers used for Register Renaming”, ACM/IEEE International Symposium on Microarchitecture (MICRO 2022), Chicago, Illinois, USA, October 1-5, 2022. C. Alverti, V. Karakostas, N. Kunati, G. Goumas, and...
Energy Efficient Computing in Multicore CPUs: Design Margins and Variability Sunday, October 21 2018, Fukuoka, Japan Afternoon tutorial held in conjunction with 51st IEEE/ACM International Symposium on Microarchitecture (MICRO 2018) Organizers/Presenters: Dimitris Gizopoulos, George Papadimitriou, Athanasios Chatzidimitriou (University of Athens) Tutorial Summary Conservative design margins in modern multicore CPU chips aim to guarantee correct...
Microarchitecture Level Reliability Assessment: Throughput and Accuracy Sunday, 15 October 2017, Boston, MA, USA Morning tutorial held in conjunction with MICRO 2017 Tutorial Summary Early assessment of the vulnerability of microprocessor components to hardware faults can drive effective protection decisions. Microarchitecture-level simulators are employed for such early assessments and can deliver reliability reports for...
“Harnessing Voltage Margins for Energy Efficiency in Multicore CPUs”, G.Papadimitriou, M.Kaliorakis, A.Chatzidimitriou, D.Gizopoulos, P.Lawthers, S.Das, IEEE/ACM International Symposium on Microarchitecture (MICRO 2017), Boston, MA, USA, October 2017.