Tutorial Presentations
March 2024
“Computing Systems Resilience to Hardware Faults: Tackling Complexity and Scale” at the 30th IEEE International Symposium on High-Performance Computer Architecture (HPCA 2024), Edinburgh, Scotland, by Dimitris Gizopoulos, George Papadimitriou, Odysseas Chatzopoulos (University of Athens), Sudhanva Gurumurthi, Vilas Sridharan, Majed Valad Beigi (AMD), Harish Dattatraya Dixit, and Sriram Sankar (Meta).
June 2021
“Methods for Characterization and Analysis of Voltage Margins in Modern CPUs, GPUs, and FPGAs” at the 48th ACM/IEEE International Symposium on Computer Architecture (ISCA 2021), Virtual Event, by Dimitris Gizopoulos, George Papadimitriou (University of Athens), Osman Unsal, Behzad Salami (BSC), Vijay Janapa Reddi (Harvard University), Jingwen Leng (Shanghai Jiao Tong University).
June 2020
“Cross-Layer Soft-Error Resilience Analysis of Computing Systems” at IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2020), June 29, 2020, Valencia, Spain, by Dimitris Gizopoulos (University of Athens, Greece), Alberto Bosio (Lyon Institute of Nanotechnology, France), Stefano Di Carlo (Politecnico di Torino, Italy), Alessandro Savino (Politecnico di Torino, Italy), Ramon Canal (Universitat Politècnica de Catalunya and Barcelona Supercomputing Center, Spain).
March 2020
“Early System Reliability Analysis for Cross-layer Soft Errors Resilience in Microprocessor Systems” at Design, Automation and Test in Europe Conference (DATE 2020), March 9, 2020, Grenoble, France, by Dimitris Gizopoulos (University of Athens, Greece), Alberto Bosio (Lyon Institute of Nanotechnology, France), Stefano Di Carlo (Politecnico di Torino, Italy), Alessandro Savino (Politecnico di Torino, Italy), Ramon Canal (Universitat Politècnica de Catalunya and Barcelona Supercomputing Center, Spain).
June 2019
“Methods for Characterization and Analysis of Voltage Margins in Multicore Processors” at the 46th ACM/IEEE International Symposium on Computer Architecture (ISCA 2019), Phoenix, Arizona, USA, by Dimitris Gizopoulos, George Papadimitriou, Athanasios Chatzidimitriou (University of Athens), Shidhartha Das (ARM), Yiannakis Sazeides, Zacharias Hadjilambrou (University of Cyprus).
October 2018
“Energy Efficient Computing in Multicore CPUs: Design Margins and Variability” at the 51st IEEE/ACM International Symposium on Microarchitecture (MICRO 2018), Fukuoka, Japan, by Dimitris Gizopoulos, George Papadimitriou, Athanasios Chatzidimitriou.
June 2018
“Energy Efficient Computing in Multicore CPUs: Design Margins and Variability” at the 45th ACM/IEEE International Symposium on Computer Architecture (ISCA 2018), Los Angeles, CA, USA, by Dimitris Gizopoulos, George Papadimitriou, Athanasios Chatzidimitriou.
October 2017
“Microarchitecture Level Reliability Assessment: Throughput and Accuracy” at the 50th IEEE/ACM International Symposium on Microarchitecture (MICRO 2017), Boston, MA, USA, by Dimitris Gizopoulos, Athanasios Chatzidimitriou, Manolis Kaliorakis.